
Master Clock System 3 Hardware Components
System Reference, January 2001
49
Master Clock System
The master clock is the timing reference for all timings,
and the heart of the test system. The tester hardware such
as the digital channel boards and analog modules use the
master clock for operating the hardware.
In the world of mixed signal testing, two different master
clocks are often needed to make use of the best perfor-
mance of arbitrary waveform generators and waveform
digitizers (including the sampler) involved in testing the
device. This is especially important in performing
coherent measurements as shown in the following figure.
Figure24 Coherent Sampling
Two Clock Domains The SOC series can have two independent domains of the
master clock sources. One is the “digital clock domain”.
The master clock of the digital clock domain is used for
digital channel boards mainly, and it can be also used for
the analog modules.
The other is the “analog clock domain”. The master clock
of the analog clock domain is used for analog modules
only.
Independent Analog Period
(Period of sampling driven by
another master clock)
Output S ignal
from DUT
Digital Period
(Period of output generated by
vectors driven by a master clock)
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